The Am28F020 is a 2 Megabit Flash memory organized as 256 Kbytes of 8 bits each. AMD’s Flash memories

offer the most cost-effective and reliable read/ write non-volat ile random access memory. The

Am28F020 is packaged in 32-pin PDIP, PLCC, and TSOP versions. It is designed to be reprogrammed and

erased in-system or in standard EPROM programmers. The Am28F020 is erased when shipped from

the factory.

The standard Am28F020 offers access times of as fast

as 70 ns, allowing high speed microprocessors to

operate without wait states. To eliminate bus contention,

the device has separate chip enable (CE#) and

output enable (OE#) controls.

AMD’s Flash memories augment EPROM functionality

with in-circuit electrical erasure and programming. The

Am28F020 uses a command register to manage this

functionality, while maintaining a JEDEC-standard 32-

pin pinout. The command register allows for 100% TTL

level control inputs and fixed power supply levels during

erase and programming, while maintaining maximum

EPROM compatibility.

AMD’s Flash technology reliably stores memory contents

even after 10,000 erase and program cycles. The

AMD cell is designed to optimize the erase and programming

mechanisms. In addition, the combination of

advanced tunnel oxide processing and low internal

electric fields for erase and programming operations

produces reliable cycling. The Am28F020 uses a

12.0±5% VPP supply input to perform the Flasherase

and Flashrite functions.

The highest degree of latch-up protection is achieved

with AMD’s proprietary non-epi process. Latch-up protection

is provided for stresses up to 100 mA on

address and data pins from –1 V to VCC +1 V.

The Am28F020 is byte programmable using 10 μs

programming pulses in accordance with AMD’s

Flashrite programming algorithm. The typical room

temperature programming time of the Am28F020 is

four seconds. The entire chip is bulk erased using 10

ms erase pulses according to AMD’s Flasherase

algorithm. Typical erasure at room temperature is

accomplished in less than one second. The windowed

package and the 15–20 minutes required for EPROM

erasure using ultraviolet light are eliminated.

Commands are written to the command register using

standard microprocessor write timings. Register contents

serve as input to an internal state-machine, which

controls the erase and programming circuitry. During

write cycles, the command register internally latches

2 Am28F020

addresses and data needed for the programming and

erase operations. For system design simplification, the

Am28F020 is designed to support either WE# or CE#

controlled writes. During a system write cycle,

addresses are latched on the falling edge of WE# or

CE#, whichever occurs last. Data is latched on the rising

edge of WE# or CE#, whichever occurs first. To simplify

discussion, the WE# pin is used as the write cycle

control pin throughout the rest of this data sheet. All

setup and hold times are with respect to the WE# signal.

AMD’s Flash technology combines years of EPROM

and EEPROM experience to produce the highest levels

of quality, reliability, and cost effectiveness. The

Am28F020 electrically erases all bits simultaneously

using Fowler-Nordheim tunneling. The bytes are programmed

one byte at a time using the EPROM

programming mechanism of hot electron injection.