The FMC HPC-U.FL Debug Board is a diagnostic tool developed for use with FPGA Mezzanine Cards (FMC) utilizing the High-Pin Count (HPC) interface. The board facilitates signal access and measurement by routing key HPC signals to U.FL, SMA, and clamp connectors. This allows developers and researchers to probe, analyze, and re-route FMC signals with minimal effort and without modifying the system under test. Signal routing includes 156 U.FL-accessible signals, with breakouts for 68 LPC LA bank lines, 48 HPC HA bank lines, 8 clock signals, and 16 differential MGT pairs. The board additionally provides 8 SMA connectors and 8 clamp connection points, which can be linked to any U.FL breakout line, enabling compatibility with standard test equipment. The debug board supports a range of configurations including board-to-board and loopback setups. The mechanical design supports stackable usage, and the board includes a power breakout area for voltage monitoring and injection. It empowers developers with full flexibility to re-route and monitor signals from the FMC HPC connector, drastically simplifying the debugging process and accelerating development cycles.