The chipset is the result of a close collaboration between Service Operator BSkyB, OEMs, and ST. Silicon includes the ST20-TP3, an MPEG2 transport demultiplexer with Embedded Conditional Access (ICAM) and a 32-bit RISC CPU.

The ST20TP3CX50S is a full system-on-chip originally designed for DVB-S/DVB-C set-top boxes and professional IRD receivers.  It marries a 32-bit ST20 RISC CPU—descended from the legendary INMOS Transputer architecture—with an on-die MPEG-2 transport-stream demultiplexer, ICAM/CSA conditional-access descrambler, smart-card I/O, DMA, and rich peripheral set.

Because later generations moved to larger, highly-integrated parts, unused factory-fresh dice of this revision are now extremely hard to find—making it a prime collectible for silicon historians, satellite-TV buffs, and embedded-systems educators.

Capability

Details

CPU core

ST20 32-bit RISC @ up to 50 MHz (CX50S suffix)

TS handling

Built-in MPEG-2 transport demux (188/204 B) with 32 filter channels

Security

Embedded ICAM / CSA conditional-access engine

Memory I/F

8-/16-bit SDRAM & Flash, on-chip cache and DMA

Peripherals

Smart-card, UARTs, parallel I/O, I²C, SSI audio

Package

QFP (see gallery), RoHS-compliant, new-old-stock

Ideal uses

  • Display piece for semiconductor or broadcast-TV collections

  • Hands-on lab for reverse-engineering, retro-firmware or smart-card security courses

  • Spare part for maintaining vintage satellite receivers based on the ST20/TP3 platform

Shipping & returns

  • Worldwide economy shipping: US $12.99 from North Point, Hong Kong; packed in foam-lined box and anti-static sleeve.

  • 30-day returns accepted (buyer pays return freight).

  • Combined shipping available—just message before paying.

Bring a piece of set-top-box history to your bench or display case—grab this ST Micro ST20TP3CX50S while they last!
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